Blog
- Shift-Left Testing is essential for reliable and scalable SDV Development.
- Which testing level best prevents critical defects from escalating?
- Can conventional or in-house test solutions keep up with SDV Development?
Close
Processor-in-the-Loop Tests
Processor-in-the-Loop Testing (or PIL Testing) means, that the piece of code we want to test is compiled with the target compiler and executed on the target processor. But why should we do this? Regardless of whether you are developing handwritten code or working in a Model-based environment like Matlab/Simulink, you are most likely performing Software-in-the-loop simulations (SIL) which run in an idealized environment on a host PC. It usually has a much more powerful CPU compared to the target processor and uses a different compiler.
This leads to some questions:
How do we know if the target compiler has an impact on the software behavior (especially relevant for floating point code)?
How can we analyze runtime aspects like execution time or stack size in early development phases?
How can we fulfill the ISO 26262 requirement to test as close as possible to the target?
Testing these target-dependent aspects only on the system level using Hardware-in-the-loop simulators (HIL) is not efficient. To find issues earlier, smaller parts of the software (e.g. a unit) can be compiled individually for the target and executed in a Processor-in-the-loop environment (PIL). To accomplish this, an evaluation board is connected to the host PC (e.g. via USB), and the PC controls the test execution on the board. PIL testing not only allows you to ensure the correct functional behavior – it also demonstrates that the tested function executes fast enough on the target CPU and that the stack on the target can handle the load.
BTC EmbeddedPlatform offers different options for performing Processor-in-the-loop Testing.
If you are working with dSPACE TargetLink models, you can run the Processor-in-the-loop (PIL) simulation directly using the built-in TargetLink mechanism. BTC EmbeddedPlatform automatically detects the available compilers and target boards and makes them available as an additional simulation level in addition to Model-in-the-loop (MIL) and Software-in-the-loop (SIL). TargetLink supports many combinations of evaluation boards and microcontrollers. The complete list can be found at www.dspace.com.
For non-TargetLink users, BTC EmbeddedPlatform can be enhanced with additional Add-Ons enabling Processor-in-the-loop (PIL) Testing by integrating iSYSTEM winIDEA or Lauterbach Trace32.
Software unit testing can be carried out at the model level followed by back-to-Back comparison tests between model and code
If you would like to try out our tools, we will gladly provide an evaluation license free of charge. Evaluations include a free launch workshop and also provide an opportunity for you to meet one-on-one with our support and engineering teams.
Do you have any questions or want to see our tools in action? If so, please use the link below to schedule a meeting, where a member of our engineering team will be happy to show you the features and use cases and directly answer any questions you might have.
If you would like to try out our tools, we will gladly provide an evaluation license free of charge. Evaluations include a free launch workshop and also provide an opportunity for you to meet one-on-one with our support and engineering teams.
Do you have any questions or want to see our tools in action? If so, please use the link below to schedule a meeting, where a member of our engineering team will be happy to show you the features and use cases and directly answer any questions you might have.
Sharing insights on embedded software development, model-based design, automatic code generation and ISO 26262 compliant testing.
Fully automated Back-to-back Test, Regression Test and Migration Test incl. Automatic Test Generation
We provide intelligent and automated test solutions which enable our customers to deal with the growing complexity of embedded software while achieving high quality in compliance with the ISO 26262 standard.
Copyright © 2025 BTC Embedded Systems & BTC Japan
